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Course Outline

Introduction to Biren GPU Architecture

  • Overview of Biren solutions and primary use cases.
  • Detailed hardware layout, including cores, memory structures, and compute clusters.
  • Comparative analysis with NVIDIA and AMD GPU architectures.

Establishing the Biren Programming Environment

  • Installation procedures for the Biren SDK and runtime components.
  • Understanding the underlying toolchain and compiler model.
  • Exploring basic project structures and the build process.

GPU Programming with the Biren Stack

  • Exploring thread and block organizational models.
  • Managing memory efficiently and handling data transfers.
  • Developing kernels and applying effective launch patterns.

Migrating from CUDA to Biren

  • Techniques for translating existing CUDA codebases.
  • Mapping common APIs and adapting to Biren’s specific structures.
  • Guided labs and practice sessions for code conversion.

Debugging and Profiling Strategies

  • Utilizing Biren’s specialized debugger and profiler tools.
  • Systematically identifying performance bottlenecks.
  • Analyzing memory access patterns and implementing optimizations.

Advanced Optimization Techniques

  • Managing thread scheduling and instruction pipelining.
  • Applying loop unrolling and leveraging shared memory effectively.
  • Executing advanced kernel tuning to maximize throughput.

Case Studies and Real-World Applications

  • Demonstrating model training using Biren accelerators.
  • Practical examples of porting and profiling vision or NLP models.
  • Evaluating performance metrics against CUDA/NVIDIA environments.

Summary and Recommended Next Steps

Requirements

  • A solid understanding of GPU architecture and parallel processing concepts.
  • Practical experience with CUDA, OpenCL, or comparable GPU programming environments.
  • Familiarity with deep learning frameworks such as PyTorch or TensorFlow.

Target Audience

  • HPC developers.
  • AI infrastructure engineers.
  • Specialists in performance optimization.
 21 Hours

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